Bus Avionics
Cascade Single Board Computer
The Cascade Single Board Computer (SBC) is designed to bring high configurability to听meet the demands of space. The 海角社区 Cascade SBC is a 3U extended SpaceVPX board听aligned to Space SOSA. The Cascade SBC board integrates the Microchip PIC64-HPSC漏听High-Performance Spaceflight Computing (HPSC) microprocessor which is a radiationhardened听10-Core RISC-V庐 processor with Layer 2 switch.
BRE440A鈩� RadHard SOC CPU
The BRE440A Central Processing Unit (CPU) is a fully radiation hardened implementation of the PowerPC 440 processor core in a true System-On-A-Chip (SOC) design, including floating point unit. It meets the requirements for a wide variety of high reliability space and missile applications.
Integrated Avionics Unit (IAU)
海角社区鈥檚 Integrated Avionics Unit (IAU) offers solutions for Command and Data Handling/Electrical Power Subsystem (C&DH/EPS) for a full range of spacecraft and payload applications.
Main Avionics Controller (MAC)
海角社区鈥檚 MAC provides Command and Data Handling (C&DH) and Electrical Power Subsystem (EPS) solutions to address LEO and short-duration/technology-demonstration missions.
Redundancy Management Unit (RMU)
Our redundant avionics solution includes two Integrated Avionics Units and a triple redundant Redundancy Management Unit (RMU). This system provides an avionics solution for long duration GEO or other missions, as well as shorter missions with extremely high reliability requirements.
C&DH I/O Boards (MOAB)
The MOAB Series of Boards provide a single 3U cPCI card solution for interfacing to a large number and variety of commonly found subsystems, payloads, and sensors. The MOAB boards handle complex and common C&DH functions.
Electronic Power Subsystem I/O Boards (SACI/PAPI/McLASI)
The SACI, PAPI, and McLASI boards provide a complete spacecraft power distribution system solution. The SACI Board provides a solar array and battery interface complete with battery charge control and telemetry feedback capability. The PAPI and McLASI boards are general purpose switching cards which are controlled via the SACI.
AJEET SBC with Xilinx V5 FPGA
The AJEET board combines the processing functions and the I/O necessary for a complete spacecraft C&DH system on a single 3U board. The AJEET uses the rad-hard BRE440 system-on-a-chip (SoC) and the rad-hard Virtex-5QV FPGA.
BRE440鈩� Radiation Hard Processor - System on a Chip (SOC)
The 海角社区 BRE440 CPU meets the requirements of a wide variety space and high reliability applications. The BRE440 CPU is a fully radiation hardened implementation of the PowerPC 440 processor core in a true System-On-a-Chip design, including floating point unit.
GPS Receiver (NAVSBR)
The 海角社区 NavSBR GPS is a POD receiver optimized for fast signal acquisition and weak signal tracking. The NavSBR is the result of our successful collaboration with NASA/Goddard.听
Payload Interface Board (PIB)
The Payload Interface Board provides a single 3U cPCI card solution to interface to spacecraft payload subsystems, with configurable realtime and high-rate interfaces and 1GByte of mass memory SDRAM.
